1. Field of the Invention
The invention relates to a solid-state imaging apparatus, and more particularly, to a solid-state imaging apparatus in which a semiconductor chip has a first wiring substrate electrically coupled between a lens unit and a second wiring substrate.
2. Description of the Related Art
In general, mobile electronic devices, such as personal digital assistances (PDAs), digital still cameras (DSCs), or mobile phones, have a built-in solid-state imaging apparatus in which a semiconductor chip and a lens are combined. In a mobile phone equipped with a small digital camera, an image of a calling party is picked up by the camera and input to the mobile phone as image data, and the input image data may be transmitted to a called party.
As such mobile equipment has become smaller and smaller, demand for miniaturized solid-state imaging apparatuses used in such mobile equipment has increased. In order to meet such demand for miniaturized solid-state imaging apparatuses, development of semiconductor packages in which a lens and a semiconductor chip are incorporated is under way.
FIG. 1 is a schematic diagram of a conventional solid-state imaging apparatus 100. The conventional solid-state imaging apparatus 100 includes a lens mounting portion 150 to which a solid-state imaging lens 160 is attached, a flexible printed circuit board (FPC) 110 and a semiconductor chip 140.
Here, the lens mounting portion 150, to which the solid-state imaging lens 160 and an IR cut filter 165 are attached, is coupled to the top surface of the FPC 110 with an adhesive. The semiconductor chip 140 converts light from the solid-state imaging lens 160 into an image signal and to process the image signal. The semiconductor chip 140 is mounted on the FPC 110 and is coupled to pads formed on a predetermined region of the top surface of the FPC 110 by bonding wires 145.
Also, development of integrated semiconductor devices having a passive element 120, such as a resistor or capacitor, mounted in the solid-state imagine apparatus 100 is under way.
That is, the passive element 120 can be mounted on a predetermined region of the FPC 110. Referring to FIG. 1, the passive element 120 is mounted near a portion where the semiconductor chip 140 is adhered. In particular, the passive element 120 is mounted in the lens mounting portion 150 to form the integrated solid-state imagine apparatus 100.
When the passive element 120 is mounted within the solid-state imaging apparatus 100, Referring to FIG. 1, a horizontal length (L1) of the solid-state imaging apparatus 100 is increased, thereby impeding miniaturization of the solid-state imaging apparatus 100.